Recently I downloaded and build the HDL reference design of AD-FMCDAQ2-EBZ. After went through the code, it seems to be too complicated for my application. I just want to send/collect the data at the JESD204 interface. I am trying to figure out if the design sends any commands through the SPI interface to initialize or configure the ADC/DAC, but I did not find those codes, maybe I missed something. Are there any configuration codes in the reference design?
Actually I built a very simple module with only a JESD204 core and JESD PHY core, I used the 500MHz reference clock from DAQ2 as the qpllclk of JESD PHY core. During my in-system debug, I did not see any clock signal from qpllclk or the TXOUTCLK port of JESD PHY core. So my question is, does DAQ2 start to provide this 500MHz clock as soon as it is plugged into HPC port and the FPGA is powered on? Or I need to turn on DAQ2 by sending some initialization commands through the SPI interface first? If initialization is required, where can I find the initialization code, thanks!