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(ADV748x)Why do output shift 40 pixel?

Question asked by donadona999s on Oct 11, 2017
Latest reply on Nov 15, 2017 by donadona999s

Hi !

 

I have some questions about ADV7480.


Q1)

At Hardware manual, this is written.

"The picture gets shifted by equal number of clocks as the hsync width. 
For example, the hsync width is 40 clock cycles for 720p, so the picture would get shifted by 40 pixel clocks.".

Why does output shift 40 pixels?

 

Q2)

At this thread, "cp_vid_std" register of ADV7480. ,

 The CP pattern generator is independent from the free run mode. It does not have to be used in free run mode.

 Best Regards,

I understood that de_h_start and de_h_end don't effect to Free run mode because pattern generator is independent from the free run mod.

What kind of things do you anticipate to use pattern generator and how do we use pattern generator?

We couldn't understand what is different between Free run mode and Pattern generator.

 

 

Best regards

Kawa

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