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How to Bypass PCG using CCES PCG driver ?

Question asked by aswinanand2006 on Oct 11, 2017
Latest reply on Oct 20, 2017 by Jithul_Janardhanan


In one of my applications (on sc589), I want to send out  the clock (12.288MHz) available on DAI0_PIN3 to a DAI1_PIN4.

1. I was hoping to send out the shared pin buffer out (DAI1_CRS_03_O ) to DAI1_PIN4_I. When I was trying this, found out that SRU is not allowing me to connect DAI1_CRS_03_O to DAI1_PIN4_I (I don't know why it's like that, because the only reason why we connected the clock to DAI0_PIN3 is because we wanted to bring this to DAI1 using shared pin buffer).

2. Then I tried feeding DAI1_CRS_03_O as an external input to PCGD, and used 0x1 as the Clock divider value. Then PCGD started outputting  12.2288MHz on PCG0_CLKD_O. I was able to send out PCG0_CLKD_O to DAI1_PIN4_I. But later on I figured out that when I use PCG0_CLKD_O, I am having audio issues in my system. This may be because DAI1_CRS_03_O and PCG0_CLKD_O are out of phase. So I can not use this method.


3. From the datasheet, I found out that you can bypass a PCG by setting FS divide value to 0x0 or 0x1. I am using CCES PCG drivers in my application and when I tried to bypass PCGD by setting FSDIV to 0/1, PCGD stopped outputting PCG0_CLKD output.


So, my question is how do I send out the "same" clock on DAI0_PIN3 (/DAI1_CRS_03_O ) to DAI1(DAI1_PIN4_I) ?
Does bypassing PCG-C/D would work as a solution ? Are there any other methods to achieve this ?


Looking forward to a swift response.




PS: Hi Jithul_Janardhanan, can you help me on this topic ?