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AD9164 Phase Noise queries

Question asked by prakash.iyer on Oct 10, 2017
Latest reply on Oct 12, 2017 by danf

Hi , I have the following questions regarding Phase noise performance of the AD9164 . Please help with inputs . 

 

  1. Page 10 of the datasheet shows SSB Phase noise at 3.8GHz and 100KHz offset as -135dBc/Hz .
    Question :
    1. Is this the absolute phase noise of the entire AD9164 chip ( which includes DDS + DAC + clock source + all other blocks inside AD9164 ) when measured at the output RF port.
  2. Figure 38 in datasheet has a comment ‘ Two different DAC clock sources used for Best composite Curve ‘ .
    Questions :
    1. Does the Phase noise plot for 1.8GHz and 3.9GHz in this figure refer to the absolute phase noise of the entire AD9164 chip ( which includes DDS + DAC + clock source + all other blocks.
    2. What does the comment  ‘ Two different DAC clock sources used for Best composite Curve ‘ refer to .
  3. There is more than 10dB difference in Phase noise results ( for 1.8GHz and 3.9GHz signals ) between Figures 38 and 41 .
    Questions :
    1. Does the Phase noise plot for 1.8GHz and 3.9GHz in this figure refer to the absolute phase noise of the entire AD9164 chip ( which includes DDS + DAC + clock source + all other blocks).
    2. What is causing the degradation in Phase noise in Figure 41 with respect to Figure 38
  4. Figure 8 in this document shows almost 10dB improvement in Phase noise ( 900MHz signal at 100KHz offset ) with respect to the Phase noise for 800MHz signal ( at 100KHz offset ) in Figure 38 of datasheet .
    1. Does Figure 8 represent the absolute phase noise of the entire AD9164 chip ( which includes DDS + DAC + clock source + all other blocks ).
    2. What is causing the Phase noise improvement in Figure 8 with respect to Figure 38

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