I am using the ADC converter in the ADuCM320 with the sequencer and DMA. I get correct results from the conversion and the system is functionally working fine.
However, when checking the time it takes to convert a sequence of ADC channels I get a different result to what I would expect.
When running at 80ksps (12.5us per channel) and having a sequence of N channels the conversion time is (12,5 x N)+25 us.
When running at 40ksps (25us per channel) and having a sequence of N channels the conversion time is (25 x N)+50 us.
What I would expect is (12.5xN) us and (25xN) us. So, it looks like it takes an additional 2 conversion cycles to every sequence. I tried this for a number of values for N between 5 and 23, and the result seems very reproducible.
Question: Does the hardware indeed add 2 additional cycles to the conversion timing by design, or is it more likely an error in one of the settings I am making ?