As per UG-180, "It is recommended to bypass each power supply pin with a 0.1 µF and a 10 nF capacitor where possible" and "It is highly desirable to provide separate regulated or heavily filtered supplies for each of the analog
circuitry groups (CVDD, TVDD, and PVDD)". However, there is no clear guideline on the power supply filtering scheme.
We are planning to use 8 ADV7611 devices in our design. The total current requirement of the 8 devices as per ADV7611 datasheet is 1888.8mA @3.3V and 2715.2mA @1.8V. We are planning to generate these power supplies (along with other 3.3V and 1.8V devices on board) using two SMPS one for each 3.3V and 1.8V. These 3.3V and 1.8V outputs from SMPS are connected to the different power supply domains of each ADV7611 via a filter NFM21PC105 (5 NFM21PC105 devices and 10µF capacitors per ADV7611, one for each power supply domain). Further, a 0.1µF and 0.01µF capacitor is added at each supply pin of all the ADV7611 devices.
Please let us know if this scheme is fine.