Starting my driver using the code in ad7175_generic.
I am generating code to communicate to the AD7175-8 ADC using an Atmel SAM4SA16B,
Cortex M4 core.
I have the AD7175-8 eval board and have extensively experimented with register
setting and etc and viewed SPI comms on a logic analyzer to understand how the
device is configured.
Now, we are using our custom PCB with the uC, two SPI I/O expanders and the AD7175-8.
I have successfully communicated with the two SPI Maxim I/O expanders using this
processor on my PC board.
The basis of my ADC communications code is the Analog Device provided Driver C code
called "ad7175_generic". I have modified Communications.h and Communications.c, renamed
to adcComms.h and adcComms.c respectively, to use the Atmel Software Foundation library
The AD7175-8 has been configured by writing to the registers, slowing acquisition
to 60 s/sec and disabling all channels. This was performed to reduce the occurrance
of the DOUT/RDY* pulses, which seemed to be read as random data if they occurred
during a register read. I have also sped up the SPI comms to the ADC to 1 MHz.
The SPI configuration writes seemed to complete successfully, however, I cannot be
certain because SPI reads are suspect. The ADC does behave as though its data
acquisition process is stopped or slowed.
To verify SPI comms with the ADC, I have tried to do as suggested on page 20 of
the datasheet and perform a read on the AD7175-8 ID Register containing 0x3CDE.
I proceed by performing a read on the ID register and set a breakpoint after the contents
are received to validate the value.
First issue - The software does not always read all bytes of the ID register.
The logic analyzer shows both bytes being transported...
Second issue - It seems I need to read 3 bytes to get all of the register contents.
The register contains only two bytes, but there seems to be a byte
of junk that needs to be read. By the way, the read seems correct
on the Logic analyzer capture.
Third issue - The logic analyzer show the read bytes being transported in an
order that is as expected. However, the bytes received in the
data buffer, over SPI are in an unexpected order.
I have battled this for several days and am now stuck.
Why does it not always read all of the register contents?
Does the AD7175-8 transmit out a byte as the command opcode is transmitted in, i.e.,
act as a shift register when receiving a command opcode byte?
Why the third junk byte when I read the ID register?
Why are the bytes from the ID register not in sequence as seen on the logic analyzer?