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SPI1 DMA Error with Slower SPI Clock

Question asked by cmerritt Employee on Sep 28, 2017
Latest reply on Nov 6, 2017 by Narsimh

I am using SPI1 with the DMA to read a stream of 40bytes for each read. For some reason the data read back by the DMA becomes out of order by 1 byte when using a slower SPI Clock. Everything works fine with SPI DIV = 1 to 24. I can run 1000 read cycles and get no errors. However, when I run SPI DIV = 25 or greater the problems show up where the DMA looks like it is placing the values one byte off in the destination array. When I check on the scope the SPI lines shows the correct response every time so it appears that the DMA is doing something odd with this slower SPI CLK. Have you guys the SPI DMA at slower SCLK speeds? One thing that I did find out was that the first read of 40 bytes works but subsequent ones fail. If I reset the micro and just perform one read I get the correct result in debug mode.


Setup information:

All of the clocks for the micro are set to 26MHz so SPI DIV = 0 -> SPICLK = 13MHz

DMA Channel Config is set for half-word destination address increment, no source increment, half-word source size, nminus1=19,enable basic mode