If I using external reference clock @80Mhz and the clock phase noise meet the requirement at UG-570 P15, and I use the ADP1755 LDO to supply V1.3 . And set AD9361 LO to 5.5GHz. How many Phase Noise @1Khz I will get? -90dBm?or batter?
You Can send DC , (All1's in I and Q) and get LO leakage out and measure phase noise of Tx.
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