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Building HDL AD9467 FMC-ZC706 in Vivado 2016.2

Question asked by ccruztorre on Sep 21, 2017
Latest reply on Oct 5, 2017 by rejeesh

I am building and generating programming files for AD9467 FMC to port ZC796. I have used separately the adapted zed and kc705 project folder (modifying the makefile, tcl files, etc) to port ZC706,. I am using the correct version of vivado 2016.2.

I have followed all the steps that analog provided in order to get a right compilation under zigwin.  I got errors in both of them in the synthesis (see attached log files)  

 

--------------------using modified zed or kc705 files------------------

 

ERROR: [Synth 8-448] named port connection 'ddr3_addr' does not exist for instance 'i_system_wrapper' of module 'system_wrapper' [c:/cygwin64/home/hdl-hdl_2016_r2/projects/ad9467_fmc/zc706/system_top.v:207]

....................................................................

RTL Elaboration failed
INFO: [Common 17-83] Releasing license: Synthesis
744 Infos, 114 Warnings, 0 Critical Warnings and 62 Errors encountered.
synth_design failed
ERROR: [Common 17-69] Command failed: Synthesis failed 

------------------------------------------------------------------------------------

 

Has anybody compiled the AD9467 FMC for the ZC706 successfully using the analog steps?

Could anybody let me know how to solve the 64 errors that show that the attached files show?

Thanks a lot

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