I'm trying to access some memory field of FPGA using AMI interface (Bank 0) on a custom board. As we need a small subset of the address range, only lower 6 address pins are used. I have initialized external port and AMI registers as:
*pSYSCTL |= EPDATA32;
// initialize asynchronous memory interface to FPGA
*(volatile int *)AMICTL0 = BW8 | AMIEN | PKDIS | WS10;
My access attempts to external port via logical addresses 0x20_0000 to 0x20_003F was unsuccessful. I have assumed lower address bits stays the same after logical internal address to physical external address conversion in the AMI controller. Was I wrong?