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21469 AMI interface to FPGA on Custom Board, 6 addr. pins

Question asked by ibotopal on Oct 31, 2011
Latest reply on Nov 2, 2011 by ibotopal

Hi,

I'm trying to access some memory field of FPGA using AMI interface (Bank 0) on a custom board. As we need a small subset of the address range, only lower 6 address pins are used. I have initialized external port and AMI registers as:

 

*pSYSCTL |= EPDATA32;
   
*pEPCTL &=~(B0SD);
// initialize asynchronous memory interface to FPGA
*(volatile int *)AMICTL0 =  BW8 | AMIEN | PKDIS | WS10;

 

My access attempts to external port via logical addresses 0x20_0000 to 0x20_003F was unsuccessful. I have assumed lower address bits stays the same after logical internal address to physical external address conversion in the AMI controller. Was I wrong?

 

Thanks,

Ibrahim

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