In the AD7626 datasheet says:
Table 3: CNV High Time has a maximum value of 40ns.
Self Clocked Mode Section: Conversions are initiated by a CNV± pulse. The CNV± pulse must be returned low (tCNVH maximum) for valid operation.
If I were to have an sampling rate of 10MHz than I have a period of 100ns. I should not use a %50 duty cycle since that will make CNV signal high for 50ns. So the duty cycle needs to be maximum 40%.
When I examine the Evaluation Module for AD7626, the AD9513 clock OUT 0 is configured to be 50% duty cycle.
This confused me. Can you please explain what I miss here?