I am working on the project using FMADAQ2 with KCU105. I use the 2016_R2 branch of the software for the hdl_2016_r2 branch. I have built the project and launch SDK application for testing.
We would like to slow down the sample rate for both ADC and DAC to 1Mbps. I am not sure whether this low rate is feasible for this design. If it is possible, how can I change it? Is it something that can be done in the SDK application alone? Like changing some parameters in the fmcdaq2.c file... maybe?
Anyone could please give a instruction of how to change the sample rates for this design? I really need some help on this.
Thank you very much.