- Is powering down the LO divider equivalent to powering down the LO? In the AD9361 document, these two terms seem to be used inter-changeably.
- When we set both AD9361 register 0x051:D4 and 0x001:D3 high, we did observe the phase relationship across multiple AD9361s are maintained during T/R switches, which is the expected behavior according to the register document. However it also appears that the TX LO is turned off while the chip is in RX mode. Does that make sense? Is there a separate circuit that can power down the LO while keeping the divider running? Note we use independent FDD mode.