I am considering the AD9375 as a potential device to design a transceiver for space applications. However, there are some questions I would like to make:
- The output power provided by this device is lower than what I need. For this reason, I would like to place a PA at the output of the AD9375 to get that power that is left and still be able to use the DPD, is this still possible? It seems it is according to the demo video of the AD9375, but I just want to be sure.
- This device is a 2x2 transceiver, however, I am only interested in a 1x1 but I am still interested in the DPD integrated in the chip. Would be possible to unable one of the channels so that we can reduce the power consumption?
-The noise figure that I have seen in the datasheet is fairly high, if I have understood correctly, for the 2.6GHz band is somewhat around 15dB. Then I assume it is important to also place an LNA in the receiver path before the AD9375, isn't it?
-In the evaluation board info, states the power consumption is less than 10W. However, in the datasheet seems it is not so high. Does this 10W value includes the power consumption of the FPGA?
-Would you recommend this chip for space apps? Where, high efficiency is important but higher Pout is needed and modulation schemes are less demanding than for 3G/4G modulations?
Thank you in advance.