The project works normally in LVDS mode.to make it work in CMOS mode, we change the source code below:
change the value equal to 0
Can you give us a little more details regarding what version of the HDL / No-OS and carrier board you are using with the project ?
hdl and no-os are the latest vertion download from official website ,hardware is zedboard + fmcomms2 ,
all is work nomality in lvds mode, thank you!
Can you take a look at the differences between :
hdl/projects/pzsdr2/ccbrk_cmos at master · analogdevicesinc/hdl · GitHub and hdl/projects/pzsdr2/ccbrk_lvds at master · analogdevicesinc/hdl · GitHub (emphasis on system_top.v) and hdl/projects/pzsdr2/common at master · analogdevicesinc/hdl · GitHub (cmos/lvds constraints) and see if you have applied all the changes ?
Also, no-OS/main.c at master · analogdevicesinc/no-OS · GitHub see the changes that are implemented when using CMOS checking how the PICOZED_SDR_CMOS parameter affects the software.
Do you have the hdl for zedboard cmos? We change the hdl for zedboard lvds to cmos.
hdl/projects/pzsdr2/ccbrk_cmos at master · analogdevicesinc/hdl · GitHub,
this program is not aimed to zedboad , the pin contraint is different.
And when using CMOS mode,the PICOZED_SDR_CMOS parameter affects the software below:
default_init_param.swap_ports_enable = 1; default_init_param.lvds_mode_enable = 0; default_init_param.lvds_rx_onchip_termination_enable = 0; default_init_param.full_port_enable = 1; default_init_param.digital_interface_tune_fir_disable = 1;
We don't have the HDL for CMOS / Zedboard, you need to change the name of the digital ports (instead of p/n pairs you'll have a double buswidth) and the IO STANDARD from LVDS_25 to LVCMOS25. Just check the difference between the two top files and constraints files.
Also, make sure to enable the AD9361 parameter:
set_property CONFIG.CMOS_OR_LVDS_N 1 [get_bd_cells axi_ad9361]
A third thing you need to do, is to either remove the clkdiv and all related logic and drive the clocks directly from the AD9361 core or set SEL_0_DIV and SEL_1_DIV to "1" or "Bypass"
Thank you very much Adrian.
What Adrian suggested is correct from the HDL point of view, however, most probably it will not work because of the FMC connector - the LVDS interface is used on FMCOMMS2 as the CMOS drive strength is too weak to go through a connector.
Take a look: AD9361, AD9364 and AD9363 [Analog Devices Wiki] and ZC706 for CMOS operation .
Thank you very much Dragos.
Now we are using our own PCB with AD9361 and xc7z045ffg676-2 on it.We have changed the hdl for zedboard and FMCOMMS2 to match with our owm PCB.We just changed the interface (the constraints) and the version of chip of the hdl.But we don't konw what shuold we do to change the no-os API to match with our own PCB? We can use hdl and no-os to run successfully in zedboard and FMCOMMS2. Zedboard is use xc7z020clg484-1.
You get a no-OS example by defining PICOZED_SDR_CMOS in config.h. Depending on your setup, swap_ports_enable may or may not be activated.
After debug, we found that the no-os dead in this function XSpiPs_SetSlaveSelect(&spi_instance, (spi->id_no == 0 ? 0 : 1));
Since it's working with your ZedBoard + FMCOMMS2 setup, it should work on your custom hardware too. Try to start again from the unmodified no-OS sources (use the 2016_R2 branch for this time).
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