AnsweredAssumed Answered

Low Sampling Rate of AD9715

Question asked by ljzhu@fdu on Sep 6, 2017
Latest reply on Sep 7, 2017 by ljzhu@fdu

Hello.

 

I am developing an application based on AD9715, and I came across a strange problem: the real maximum sampling rate of the DAC is much lower than it is described in the datasheet.

 

Referencing to AD9715 Datasheet Rev. A, I  make the DAC work in Pin Mode, control the data inputs and clocks with a FPGA, connect a 16k resistor to FSADJI and FSADJQ, and use ADA4899 in the differential voltage output circuit. I use both I DAC and Q DAC, so the data inputs DB[9 : 0] are time-multiplexed for each DAC, with a DDR format. It works well and the output voltage is accurate when the data inputs DB[9 : 0] for each DAC keep constant or change at a slow rate, which is lower than 400 samples per second. If the sampling rate (I mean the speed in which DB[9 : 0] for each DAC changes) increases, the output voltage (the differential voltage outputted by two ADA4899s) range will rapidly shrink. As a result, if the sampling rate is higher than 200KSMS, the output voltage will tend to be equal to the full-scale voltage, regardless of the digital inputs. That is, the real maximum sampling rate of AD9715 is 200KSMS, which is much lower than 125MSPS, as described in the datasheet.

 

In order to solve the problem, I have tried the following methods.

 

  • I removed ADA4899 and use a resistor as the output overload. However, the output voltage tends to be zero when the sampling rate is high, which means the output current is always zero despite that digital inputs keep changing.
  • I measured the DC voltage of each pin of AD9715. The voltage of REFIO is equal to 1.0V as expected, but the voltage of FSADJI and FSADJQ drops from 1.0V to 0V when the sampling rate increases. I have no idea why the voltage would drop but maybe there is something wrong inside the chip.
  • I bought another chip of AD9715 from a different retailer, and replaced the older one. This chip performs a little differently: the voltage of FSADJI and FSADJQ would not drop due to the increase of sampling rate. But it still doesn't work in high speed ---- the output current of will decrease to zero.
  • I implemented a simple SPI controller, made the DAC work in SPI mode, and changed the defaulted value of some register. I adopted the internal reference mode by writing to register 0x01, but it made no change. Besides, the auxiliary DACs doesn't work even if I followed the instructions in the datasheet ---- the output current is always zero. Additionally, I performed self-calibration which is also useless. I nearly ran out of my ideas in dealing with the problem.
  • Last but not least, I tried to read the Version Register (0x1F), and the value I got was 0x4. It is unreasonable because the datasheet shows that the defaulted value should be 0x3. Does that mean I bought a chip of the wrong version?

Could you please give me some advice about my problem? Sorry for my poor English and thank you so much for your attention.

 

Best Regards,

Lingjun

Outcomes