AnsweredAssumed Answered

ADV7619 interrupt storm

Question asked by snovak.rtrk on Sep 1, 2017
Latest reply on Sep 13, 2017 by snovak.rtrk
Hi, I'm using ADV7619 on my board, in pair with my FPGA/FreeRTOS, I'm also using the evaluation board EVAL-ADV7619-7511.
I'm also testing it with Quantum Data 804B Signal generator. Going through the user guide I didn't find instructions for adequate HDMI Initialization and configuration, so I implemented HDMI Initialization 
according to the recommended settings script. 
When I reboot my board with the Quantuum Data's cable plugged into HDMI port A, I always get an never-ending interrupt storm.
The evaluation board seems to get a lot of interrupts as well, but somehow determines that the video is stable.
I'm using the recommended board settings script ADV7619-VER.1.9c.txt.
I have a couple of questions about the proper use/config of ADV7619:
1. I don't understand the different recommended configurations based on resolution, is it really necessary to change ADV7619 configuration based on input signal resolution/framerate/pixel clock?
If it is, when am I supposed to re-configure the ADV7619?
2. After powering up the ADV7619, am I supposed to configure it for some mode ( <=170MHz or >170MHz) ? I'm currently setting it to >= 170 MHz.
3. How do I determine that the video is stable?
I'm currently waiting for the following:
STDI_DATA_VALID_RAW= 1
CP_UNLOCK_RAW = 0
CP_LOCK_RAW = 1
TMDSPLL_LCK_A_RAW =1
TMDS_CLK_A_RAW = 1
V_LOCKED_RAW = 1
DE_REGEN_LCK_RAW = 1
CABLE_DET_A_RAW = 1

I'm also setting the following interrupt config:
# Power Down Reg to 0
wri2c 98 0C 00
# >170 MHz script
{   0x98, 0xF4, 0x80}, // ; CEC
{   0x98, 0xF5, 0x7C}, // ; INFOFRAME
{   0x98, 0xF8, 0x4C}, // ; DPLL
{   0x98, 0xF9, 0x64}, // ; KSV
{   0x98, 0xFA, 0x6C}, // ; EDID
{   0x98, 0xFB, 0x68}, // ; HDMI
{   0x98, 0xFD, 0x44}, // ; CP
{   0x68, 0xC0, 0x03}, // ; ADI Required Write
{   0x98, 0x01, 0x06}, // ; Prim_Mode =110b HDMI-GR
{   0x98, 0x02, 0xF5}, // ; Auto CSC, YCrCb out, Set op_656 bit
{   0x98, 0x03, 0x80}, // ; 16 bit SDR 422 Mode 0
{   0x98, 0x05, 0x28}, // ; AV Codes Off
{   0x98, 0x06, 0xA6}, // ; Invert VS,HS pins
{   0x98, 0x0C, 0x42}, // ; Power up part
{   0x98, 0x15, 0x80}, // ; Disable Tristate of Pins
{   0x98, 0x19, 0x90}, // ; LLC DLL phase
{   0x98, 0x33, 0x40}, // ; LLC DLL MUX enable
{   0x44, 0xBA, 0x01}, // ; Set HDMI FreeRun
{   0x44, 0x6C, 0x00}, // ; Required ADI write
{   0x64, 0x40, 0x81}, // ; Disable HDCP 1.1 features
{   0x4C, 0xB5, 0x01}, // ; Setting MCLK to 256Fs
{   0x68, 0xC0, 0x03}, // ; ADI Required write
{   0x68, 0x02, 0x03}, // ; ALL BG Ports enabled
{   0x68, 0x03, 0x98}, // ; ADI Required Write
{   0x68, 0x10, 0xA5}, // ; ADI Required Write
{   0x68, 0x1B, 0x08}, // ; ADI Required Write
{   0x68, 0x45, 0x04}, // ; ADI Required Write
{   0x68, 0x97, 0xC0}, // ; ADI Required Write
{   0x68, 0x3D, 0x10}, // ; ADI Required Write
{   0x68, 0x3E, 0x69}, // ; ADI Required Write
{   0x68, 0x3F, 0x46}, // ; ADI Required Write
{   0x68, 0x4E, 0xFE}, // ; ADI Required Write
{   0x68, 0x4F, 0x08}, // ; ADI Required Write
{   0x68, 0x50, 0x00}, // ; ADI Required Write
{   0x68, 0x57, 0xA3}, // ; ADI Required Write
{   0x68, 0x58, 0x07}, // ; ADI Required Write
{   0x68, 0x6F, 0x08}, // ; ADI Required Write
{   0x68, 0x83, 0xFC}, // ; Enable clock terminators for port A & B
{   0x68, 0x84, 0x03}, // ; ADI Required Write
{   0x68, 0x85, 0x10}, // ; ADI Required Write
{   0x68, 0x86, 0x9B}, // ; ADI Required Write
{   0x68, 0x89, 0x03}, // ; ADI Required Write
{   0x68, 0x9B, 0x03}, // ; ADI Required Write
{   0x68, 0x93, 0x03}, // ; ADI Required Write
{   0x68, 0x5A, 0x80}, // ; ADI Required Write
{   0x68, 0x9C, 0x80}, // ; ADI Required Write
{   0x68, 0x9C, 0xC0}, // ; ADI Required Write
{   0x68, 0x9C, 0x00}, // ; ADI Required Write
# interrupt config - level sensitive, drive high when active, active until cleared, 
wri2c 98 40 E2
# un-mask CP_LOCK, CP_UNLOCK, etc
98 46 1C
# port A select
98 6E 53
98 73 01
The interrupts I keep getting are:
STDI_DATA_VALID_ST = 0
CP_UNLOCK_ST = 0
CP_LOCK_ST = 0
TMDSPLL_LCK_A_ST = 1
TMDS_CLK_A_ST = 0
V_LOCKED_ST = 1
DE_REGEN_LCK_ST = 1
CABLE_DET_A_ST = 0
============================================
STDI_DATA_VALID_ST = 1
CP_UNLOCK_ST = 0
CP_LOCK_ST = 0
TMDSPLL_LCK_A_ST = 0
TMDS_CLK_A_ST = 0
V_LOCKED_ST = 0
DE_REGEN_LCK_ST = 0
CABLE_DET_A_ST = 0
============================================
STDI_DATA_VALID_ST = 0
CP_UNLOCK_ST = 0
CP_LOCK_ST = 0
TMDSPLL_LCK_A_ST = 0
TMDS_CLK_A_ST = 0
V_LOCKED_ST = 1
DE_REGEN_LCK_ST = 0
CABLE_DET_A_ST = 0
============================================
STDI_DATA_VALID_ST = 0
CP_UNLOCK_ST = 0
CP_LOCK_ST = 0
TMDSPLL_LCK_A_ST = 0
TMDS_CLK_A_ST = 0
V_LOCKED_ST = 1
DE_REGEN_LCK_ST = 0
CABLE_DET_A_ST = 0

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