In my application , i am using ad5791 DAC with zc702 . please provide me any example code vhdl for ad5791 is available.
thank you in advance.
I believe you can refer to the AD5791 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design and perform the necessary changes to be compatible with your ZC702.
I have written code in VHDL for ad5791 DAC for "nexys4 DDR" fpga board and attached simulation waveform image below.
i am obtaining output pins required for dac via pmod 1 connector of nexys 4 ddr .
please give me suggestion , i have given 5 v to j2 ,
vdd= +10 v and vss= - 10 v to j1
Vref = 5v dc from generator
lk1 is at position B
lk3 is at position A
lk4, lk5 and lk6 is open
lk 9 is at position c.
as shown on figures below
what improvement should i do so i will get output ?
Do you have an EVAL-SDP-CB1Z?, you can try to use the evaluation software (download here) and test just to make sure your evaluation board setup is working. If you do this, please remove all PMOD connections.
If you don't have one, please check Vcc, Vdd,Vrefpf and Vrefnf voltages just to make sure they are correct.
On the communication side, here are some things you can check:
1) Get actual waveforms of SDIN, SCLK, /SYNC, /LDAC, /CLR, and /RESET.
- using these waveforms, please check if the logic levels comply with the Logic input requirements on the spec table (page 4)
- make sure that they follow the timing specifications (page 5)
2) it is important not to leave any input pin with unknown state, should only be high or low.
3) Can you also please provide the frame values (in hex, 1 frame = 24 bits) sent to the DAC upon power-up?
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