I'm waiting for NoOS fmcdaq2 new release with (ADI Jesd204b IP) so the equivalent to HDL R2017_r1, I'm using the dev branch which is still not working completely in Loop back mode ..
thanks for your feedback
It should work, but switch to 'dev' branch.
2017-r1 update will be a bit later (it is mainly for MW folks & fmcomms2)
thanks rejeesh, the no-os dev branch (fmcdaq2 on KC705) works for DDS 1000 Mhz sampling, but not DMA Cyclic mode. For 500Mhz adc sampling rate .. works bad with too much spurs see my other Post ( changing ADC rate) .
Rejeesh I would like to express you my urgent support need: I would like to get hdl R2017_r1 (because ADI Jesd20B inside) working at the smallest possible ADC sampling rate (Lars told me 330 Mhz) .. Our customer is waiting to see our demonstrator working in real time. We have evaluated our system off line, with ADS7-V2-EBZ+AD9164 TX path
and ADS7-V2-EBZ+AD6684 RX path, now we need your help to get TX+RX + our Design loop back in real time
I appreciate your help to get rid with fmcdaq2 design reference.
Best regards Mohamed
Retrieving data ...