I learned that the ADuC7061 needs the power on with the reset pin low otherwise often the ports on pin3-4 are broken.
I don't know why..
I connect to pin 3-4 a FPGA for the comunication..
I pull-up to 2.5V with a resistor 4K7
Anyone can help me?
I am not very clear understand what's your mean. It will be good that if you can share me the document that mentioned the information you described.
If you use pin3 and pin4 as SIN and SOUT of UART, you don' t need the pull up resistors. You can refer the evaluation board schematic from the UG-029 for this design
Thank you for the answer
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Here you can see a example.
Often after the power on, the ports on pin 3-4 are not to 2.5V ..so..IHMO are broken (i can't comunicate with the uC)
Are you sure....it doesn't need the pull-up resistors?
Yes i checked UG-209..i can try without pull up resistors..but will it need pull-up FPGA ports?
Do you reconfigure the Pin3-4 as SIN and SOUT after a power on reset? The default status of IOs are input with internal pull up resistor.
I don't think it is necessary to use pull up resistor for Uart communication including in FPGA ports. I remembered, not very sure, that FPGA should have internal pull up resistor can be configured. You can have a try.
During the power on i keep in reset the uC.
After it leave the reset to "1"
In this way works.
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