I am using the eval board eval ad5933ebz to make measurements of a network consisting of a parallel capacitor and a parallel resistor. The excitation frequency is 1 KHz , a 2 MHz crystal oscillator was added to the board. the eval sw reports in a saved file the values of a sweep very close to this frequency.
we are interested in reporting the parallel equivalent , not the series equivalent like the part reports. for testing , we use known value of resistors and capacitors , compare the value obtained with ad5933 measurements with an lcr meter.
Most of the test cases are within a few percents of a parallel resistance and capacitance reported by the lcr meter. Not so on the test case of an impedance formed by a 10 nf in parallel with 1 Meg yields a significant error ( about 30% on the parallel resistance)
that test case has an admittance angle of 89.1 degree from theoretical calculation. the lcr meter reports 89.0 degrees. The Ad5933 when 10 measurements are averaged reports 88.6 degrees.
while one might think that an error of 0.5 degrees has no consequences. when calculating using a spreadsheet and using the theoretical phase, the parallel resistance error is reduced to about 3%
It would appear that the AD5933 reported incorrectly the phase by this small amount. For the other test cases that have smaller phase angles the problem is not present.
How can i improve the phase accuracy of the impedance measurement?
Is it possible that this small error is caused by using 2.0 MHz for Mclk? to get exactly 2 cycles of the 1 KHz sine wave into a 1024 buffer, a clock of 2.048 MHz would be needed. The waveform is truncated to under 2 cycles when the lower frequency is used.
thanks in advance for any help.