AnsweredAssumed Answered

Dividing Blackfin L1 data Sram into sub-banks

Question asked by HeikkiL on Aug 20, 2017
Latest reply on Sep 1, 2017 by HeikkiL



Blackfin BF506F contains only internal data bank "L1 data bank A" but no "L1 data bank B".  Efficient execution of multiply-accumulate operation (MAC) utilizing the two multipliers and accumulators requires that the two vectors to be multiplied are located in different memory banks. All examples of efficient code in various manuals assume that the processor contains both memory banks, A and B. Thus, the L1 data bank A of the BF506F should be divided into two sub-banks for utilizing the processor's efficient MAC mechanism.


AD manuals do not seem to present simple guidelines for defining sub-banks in the LDF file. I would appreciate simple examples of sub-bank definition so that the sub-banks can be used in pragmas like section("L1_data_a").