How can I extend the functionality of an FPGA reference design to control/monitor more aspects of my ADI evaluation board?
To extend the set of parameters that can be monitored/controlled from a reference design two steps must be taken:
- The first is to map to the new parameters a set of new variables in the program running on the soft core processor implemented in the FPGA. These variables will be exported automatically to the uC-Probe interface.
- The second step is to add new controls in the uC-Probe interface and associate these controls with the new exported variables.
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