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problem regarding cw signal in ad9364

Question asked by rahulram on Aug 16, 2017
Latest reply on Aug 23, 2017 by rahulram


    i have been using zc706 board along with adi fmcomms4 board for my design to transmit and receive ofdm modulated signals. i have done modifications to the reference hdl design to suit my design specifications and my design works perfectly. i have been working on this design in no os software for quite some time now . i am running my design on fagc mode . although i am getting some problems my design seems to work fairly on all powers of the problem that i am facing is with the cw signal being transmitted along with my frame when i change the signal power with the help of a variable attenuator to check my sensitivity and per rate. at some particular dbm of power i get cw wave in between my frames which increases suddenly due to which i get packet error . now i know that this can be solved by changing the coarse and fine tuning, but it isnt exactly a solution as i cannot keep on changing it for other boards also,firstly is the noise that we see ,supposed to change as we change the signal power  by attenuating the transmitting signal in fagc mode and how can i eliminate the sine wave that i see in between my packets. i have also attached the screenshot of the signal that i am receiving for reference. pls help me with this .