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JESD configuration modifications AD9371

Question asked by adgoodw on Aug 10, 2017
Latest reply on Aug 31, 2017 by adgoodw

Hello again,

I have a few questions regarding JESD configuration. I am working with an AD9371 / ZC706 with 2016_r2 versions of HDL and No-OS.


1) I would like to be able to configure the AD9371 so that 2 lanes are being used by the RX0/RX1 channels, 1 lane for a single ORX channel, and 2 lanes for TX0/TX1. The remaining 3 JESD lanes should be disabled. When I try to start this by modifying the ORX Framer configuration to enable only one lane, I get a OrxFramerStatus = 0x20, which seems to me that the link synchronization isn't even starting? I get the same result when trying this with the RX framer configuration. This is the result when I leave the enableManualLaneXbar parameter disabled.


I tried to enable the enableManualLaneXbar parameter, but I'm confused about how the serializerLaneCrossbar parameter is supposed to work. When I enable enableManualLaneXbar for both rxFramer and obsRxFramer, everything works fine when I leave the default serializerLaneCrossbar parameters of 0x08 for RX and 0x40 for ORX. This is where I'm confused. Even if one byte is ignored for each, it appears that 0x08 will map to lane 2 and lane 0, and 0x40 will map to lane 1 and lane 0. This can't be correct, where is my misunderstanding?


When I try to configure the TX0/TX1 channels to 2 lanes instead of 4, I change the deserializerLanesEnabled to 0x03, deserializerLaneCrossbar to 0x08, and enableManualLaneXbar to 1. I get a similar result of DeframerStatus = 0x21.


Are there other modifications necessary to get the JESD configuration I desire, or will this not work for some other reason?



2) Next question is regards to JESD link latency, separate from above. When leaving all framer/deframer parameters at default values, I can drop the K factor down as low as 5, and the link still establishes and everything works fine. I am only testing the RX path and latency. With the no-OS unmodified, I made some minor modifications to the HDL to view test waveforms in ILA only, as well as connected the external user PMOD pins on ZC706 as a means to test latency. When I drop the K factor down from 32 to 5, we only see a gain of 200ns. We expected much more (estimated around 1us). There is no latency gain from decreasing the K factor from 32 to 16. Is there some reason I would not get what we expect from modifying this parameter?