AnsweredAssumed Answered

ADV7482 Problem with 720x480p@60 and 720x576@50 input

Question asked by stun on Aug 6, 2017
Latest reply on Aug 7, 2017 by JeyasudhaMuthuPerumal

Hi everybody,

Please help me to response the below query urgently!!!!

I configure ADV7482 to receive SDTV HDMI resolution ( 720x480p@60 and 720x576@50 ) inputs. I can detect exactly these resolutions and  PLL locked also but there's no any data signal in the output. The output is only kind of free-run mode. Besides, VGA ( 640x480p@60) and HDTV ( 1280x720p@60) resolution are work fine.

Here are my script:

 

    { 0xE0, 0x00, 0x30 },  // Disable chip powerdown - powerdown Rx
    { 0xFF, 0x01, 0x05 },
    { 0xE0, 0xF3, 0x4C },  // DPLL Map Address Set to 0x4C
    { 0xE0, 0xF4, 0x44 },  // CP Map Address Set to 0x44
    { 0xE0, 0xF5, 0x68 },  // HDMI RX Map Address Set to 0x68
    { 0xE0, 0xF6, 0x6C },  // EDID Map Address Set to 0x6C
    { 0xE0, 0xF7, 0x64 },  // HDMI RX Repeater Map Address Set to 0x64
    { 0xE0, 0xF8, 0x62 },  // HDMI RX Infoframe Map Address Set to 0x62
    { 0xE0, 0xF9, 0xF0 },  // CBUS Map Address Set to 0xF0
    { 0xE0, 0xFA, 0x82 },  // CEC Map Address Set to 0x82
    { 0xE0, 0xFB, 0xF2 },  // SDP Main Map Address Set to 0xF2
    { 0xE0, 0xFC, 0x90 },  // CSI-TXB Map Address Set to 0x90
    { 0xE0, 0xFD, 0x94 },  // CSI-TXA Map Address Set to 0x94
    { 0xE0, 0x00, 0x40 },  // Disable chip powerdown & Enable HDMI Rx block
    { 0x64, 0x40, 0x83 },  // Enable HDCP 1.1  
    { 0x68, 0x00, 0x08 },  // Foreground Channel = A
    { 0x68, 0x98, 0xFF },  // ADI Required Write
    { 0x68, 0x99, 0xA3 },  // ADI Required Write
    { 0x68, 0x9A, 0x00 },  // ADI Required Write
    { 0x68, 0x9B, 0x0A },  // ADI Required Write
    { 0x68, 0x9D, 0x40 },  // ADI Required Write
    { 0x68, 0xCB, 0x09 },  // ADI Required Write
    { 0x68, 0x3D, 0x10 },  // ADI Required Write
    { 0x68, 0x3E, 0x7B },  // ADI Required Write
    { 0x68, 0x3F, 0x5E },  // ADI Required Write
    { 0x68, 0x4E, 0xFE },  // ADI Required Write
    { 0x68, 0x4F, 0x18 },  // ADI Required Write
    { 0x68, 0x57, 0xA3 },  // ADI Required Write
    { 0x68, 0x58, 0x04 },  // ADI Required Write
    { 0x68, 0x85, 0x10 },  // ADI Required Write
    { 0x68, 0x83, 0x00 },  // Enable All Terminations
    { 0x68, 0xA3, 0x01 },  // ADI Required Write
    { 0x68, 0xBE, 0x00 },  // ADI Required Write
    { 0x68, 0x6C, 0x01 },  // HPA Manual Enable
    { 0x68, 0xF8, 0x01 },  // HPA Asserted
    { 0x68, 0x0F, 0x00 },  // Audio Mute Speed Set to Fastest (Smallest Step Size)
    { 0xE0, 0x04, 0x02 },  // RGB Out of CP
    { 0xE0, 0x12, 0xF0 },  // CSC Depends on ip Packets - SDR 444
    { 0xE0, 0x17, 0x80 },  // Luma & Chroma Values Can Reach 254d
    { 0xE0, 0x03, 0x86 },  // CP-Insert_AV_Code
    { 0x44, 0x7C, 0x00 },  // ADI Required Write
    { 0xE0, 0x0C, 0xE0 },  // Enable LLC_DLL & Double LLC Timing
    { 0xE0, 0x0E, 0xDD },  // LLC/PIX/SPI PINS TRISTATED AUD Outputs Enabled
    { 0xE0, 0x10, 0xA0 },  // Enable 4-lane CSI Tx & Pixel Port
    { 0x94, 0x00, 0x84 },  // Enable 4-lane MIPI
    { 0x94, 0x00, 0xA4 },  // Set Auto DPHY Timing
    { 0x94, 0xDB, 0x10 },  // ADI Required Write
    { 0x94, 0xD6, 0x07 },  // ADI Required Write
    { 0x94, 0xC4, 0x0A },  // ADI Required Write
    { 0x94, 0x71, 0x33 },  // ADI Required Write
    { 0x94, 0x72, 0x11 },  // ADI Required Write
    { 0x94, 0xF0, 0x00 },  // i2c_dphy_pwdn - 1'b0
    { 0x94, 0x31, 0x82 },  // ADI Required Write
    { 0x94, 0x1E, 0x40 },  // ADI Required Write
    { 0x94, 0xDA, 0x03 },  // i2c_mipi_pll_en - 1'b1
    // ** delay 2 **
    { 0x94, 0x00, 0x24 },  // Power-up CSI-TX
    // ** delay 1 **
    { 0x94, 0xC1, 0x2B },  // ADI Required Write
    // ** delay 1 **
    { 0x94, 0x31, 0x80 },  // ADI Required Write

 

/*EDID*/

------

------

Can someone help me, please ?

 

Thank you all

Outcomes