When I reboot the device bit 4 in the status register (POR_FLAG) is set and the factory settings are loaded in the offset and gain registers. When I read the status register once the POR_FLAG is reset. I think this is all normal behaviour.
But when I call my AD7124 reset routine all above does not appear to happen. So obviously the reset does not get executed. My reset routine sets DIN high, CS low and SCLK clocks 100 times.
What am I doing wrong?
The following in the datasheet (rev.C) confuses me:
Pag 51: The POR_FLAG bit in the status register is set to 1 when the reset is initiated and then is set to 0 when the reset is complete.
Pag 78: The status register must be read to clear the bit