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AD5422 has a bug with a Clear Select pin.

Question asked by victor_zh on Jul 19, 2017
Latest reply on Aug 3, 2017 by victor_zh

If the clock signal at low frequency of 5kHz is applied at Clear Select Pin, it is possible to observe that at least one  in hundred clocks is ignored - the high level of Clear Select pin is ignored at the DAC output (it does not fall to zero voltage). The DAC value is constantly updated via SPI at 64kHz cycle rate to the midrange value.


While at the fault state the Clear Select pin high level is ignored by the DAC, it also does not respond to the changes sent via SPI.


Any workaround?