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ADV7842 free running while normally outputs video?

Question asked by Neera-Yu on Jul 16, 2017
Latest reply on Jul 21, 2017 by Neera-Yu

Video input -> ADV7842 -> FPGA ->LCD

I'm building a video system with ADV7842 on my own board (along with Xilinx 7 series FPGA), and FPGA outputs signals to drive a LCD. This system needs to be compatible with many video format like VGA/DVI/HDMI/PAL.

The current workaround is that I go through all the ADV7842 configuration arrays, and see if CP free run status(0x44, 0xFF, bit4) is 0 under any kind of configuration which I thought can determine whether there is a valid video input.  This works fine for DVI input. (when the ADV7842 is configured for DVI input, then CP free run status is 0 when there is a DVI input presented.)

But this doesn't seem to work for VGA inputs.  Checking the CP Status Register, I found the free run status bit is 1 even when there is a normal output on LCD.

Why isn't there a single color screen if CP is under free run status?

So is the workaround for ADV7842 configuration feasible anyway? Is there a better solution for various video formats?


Free run configuration: A single color. 

Video Input: 1920*1080 p @ 60Hz (Intel display card) VGA.


ADV7842 configuration for the video:


{ 0x40, 0x00, 0x07, 0x00 }, //VID_STD: 0111 (Auto-graphics Mode)
{ 0x40, 0x01, 0x82, 0x00 }, //PRIM_MODE: 0010 (Graphics)
{ 0x40, 0x02, 0xF0, 0x00 }, //RGB output = 0
{ 0x40, 0x03, 0x90, 0x00 }, //YUV 16 bit output
{ 0x40, 0x05, 0x28, 0x00 }, //No AV code insertion
{ 0x40, 0x06, 0xA6, 0x00 },
{ 0x40, 0x0C, 0x40, 0x00 },
{ 0x40, 0x15, 0xB0, 0x00 },
{ 0x40, 0x16, 0xC8, 0x00 },
{ 0x40, 0x17, 0x98, 0x00 },
{ 0x40, 0x19, 0x90, 0x00 }, //LLC DLL Phase
{ 0x40, 0x33, 0x40, 0x00 }, //Enables Mux
{ 0x44, 0x73, 0xEA, 0x00 },
{ 0x44, 0x74, 0x8A, 0x00 },
{ 0x44, 0x75, 0xA2, 0x00 },
{ 0x44, 0x76, 0xA8, 0x00 },
{ 0x44, 0x7C, 0xC0, 0x00 },
{ 0x44, 0x7E, 0x00, 0x00 },
{ 0x44, 0x7C, 0xC3, 0x00 },
{ 0x44, 0x7D, 0xFF, 0x00 },
{ 0x44, 0x85, 0x0B, 0x00 },

//Normal Blanking
{ 0x44, 0x8B, 0x4F, 0x00 },
{ 0x44, 0x8C, 0xED, 0x00 },
{ 0x44, 0x8B, 0x4F, 0x00 },
{ 0x44, 0x8D, 0x20, 0x00 },
{ 0x44, 0x8F, 0x41, 0x00 },
{ 0x44, 0x90, 0xA8, 0x00 },
{ 0x44, 0x91, 0x00, 0x00 },
{ 0x44, 0xAB, 0x46, 0x00 },
{ 0x44, 0xAC, 0x50, 0x00 },
{ 0x44, 0xA5, 0x46, 0x00 },
{ 0x44, 0xA6, 0x20, 0x00 },
{ 0x44, 0xA7, 0x2A, 0x00 },

{ 0x44, 0xBE, 0x02, 0x00 },
{ 0x44, 0xBF, 0x32, 0x00 },
{ 0x44, 0xC3, 0x39, 0x00 },
{ 0x4C, 0x0C, 0x1F, 0x00 },
{ 0x4C, 0x12, 0x63, 0x00 },
{ 0x4C, 0x00, 0x80, 0x00 },
{ 0x4C, 0x02, 0x00, 0x00 },
{ 0x4C, 0xC8, 0x33, 0x00 } }; //ADC DLL Phase


Then the output video by ADV7842 goes through the FPGA and drive a LCD:

LCD output


CP free run status (0x44,0xFF,bit4): 1.