The data sheet states that DAC can be connected internally to comparator.
HOW (?) / where is that accomplished.
There is not internal connection path to the comparator. I scanned through both datasheets and do not see any references to internal connections, can you indicate which page, or take a screen shot of the place in the datasheet where you got this impression?
Thanks for reply.
It is in "general description" - here is excerpt.
This sine wave can be used directly as a frequency source, or internally converted to a square wave for agile-clock generator applications. The
The AD9851 contains an internal high speed comparator that can be confi gured to accept the (externally) fi ltered output of the DAC to generate a low jitter output pulse.
Confusing. It implies BOTH internal or external usage of the comparator. AD9850 module I have has DAC and comparator outputs, no comparator inputs , but I am not in position to just hook it up and see. So I figured I may as well ask.
Here is partial "general description" :
The AD9851 is a highly integrated device that uses advancedDDS technology, coupled with an internal high speed, highperformance D/A converter, and comparator, to form a dig i tal lyprogrammable frequency synthesizer and clock generator func- tion. When referenced to an accurate clock source, the AD9851generates a stable frequency and phase-programmable digitizedanalog output sine wave. This sine wave can be used directly asa frequency source, or internally converted to a square wave foragile-clock generator applications. The AD9851’s innovativehigh speed DDS core accepts a 32-bit frequency tuning word,which results in an output tuning res o lu tion of approximately0.04 Hz with a 180 MHz system clock. The AD9851 con tainsa unique 6 REFCLK Multiplier circuit that eliminates theneed for a high speed reference oscillator. The 6 REFCLKMultiplier has min i mal impact on SFDR and phase noise char- ac ter is tics. The AD9851 provides fi ve bits of programmablephase mod u la tion resolution to enable phase shifting of itsoutput in in cre ments of 11.25°.The AD9851 contains an internal high speed comparator thatcan be confi gured to accept the (externally) fi ltered output of theDAC to generate a low jitter output pulse.The frequency tuning, control, and phase modulation words areasynchronously loaded into the AD9851 via a parallel or serialloading format. The parallel load format consists of fi ve it er a tiveloads of an 8-bit control word (byte). The fi rst 8-bit byte controlsoutput phase, 6 REFCLK Multiplier, power-down enable andloading for mat; the remaining bytes comprise the 32-bit frequencytuning word. Serial loading is accomplished via a 40-bit serial datastream entering through one of the parallel input bus lines. TheA
Thank you. I see it is possible to infer from the first statement 'internally converted to a square wave,' that there is an internal connection path. What we are saying with that statement is that there is an internal squaring function, I'll think about how we might make that less ambiguous.
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