I'm trying to use the SPI Chip Select interrupt on an ADuCM362. I'm in continuous mode with CSIRQ_EN bit set in register SPI0DIV. When I'm looking at CSRSG and CSFLG flags of SPI0STA register in my interrupt handler, i never catch the event.
In user guide UG-1048 rev.0, the description of CSRSG flag speaks about high frequency mode, which is not described elsewhere in the document. The only place where high frequency mode is mentionned is the ADuCM362.h header, version v0.4 from Analog ftp. The SPI0DIV_HFM bit of the header targets a reserved bit of SPI0DIV according to the user guide.
So my questions are :
- Does Chip select require "high frequency" mode ?
- What is the high frequency mode ?
- If I set the HFM / reserved bit, will the ADuC break ?
- If high frequency mode fails, is there any workaround to use Chip select interrupt ?