I use the zc706/adrv9371x reference design on branch 2016.2.
I can build the project in windows ,and PASS synthesis,implementation.
But I failed to generate bit files because Jesd204 IP don't support generate bitstream.
In the IP status catalog,Jesd204 IP license is "Design linking".others are "include".
I have already got a license for Xilinx,all the tools status seems not problem.
Do you have any suggestions? Can you send me a bitstream file of zc706/ad9371 projects,i will appreciate of it.