I would like to know how much cycles would be taken when interrupt came from external peripheries, for example PINT0 ?
I assume System Event Controller might take cycles but I could not find descriptions in HRM and PRM.
I only find following in regard to cycles in processor core in HRM and this EngineerZone as DOC-12405(What is the minimum latency between a Core interrupt and the branch to the IVT?), has to be add to the cycles consumed in SEC.
Your helps always be appreciated.