I am configuring AD5263 with 3.3V powered Spartan VI FPGA. Schematics as shown:
Since Host device is 3.3V , Vlogic =3.3V (3v3 in schematics)
DigiPot is used for Op-Amp Gain Adjustment and Op-Amp operating on ± 12V.
Vdd = +12V
Vss = -12V
No of Op-Amps = 4 ( All 4 ch. pots used)
Is this configuration correct? Please suggest.