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AD7352 Operation

Question asked by EngJunkie on Jun 22, 2017
Latest reply on Jun 27, 2017 by EngJunkie

Good day everyone,

 

I just want to make sure I understand the operation of this device(AD7352).

 

From the description it appears that the device has 2 input channels and can sample each channel at up to 3MPSP at a 12 bit resolution. The output of the device can be obtained from either SDATA(A) or SDATA(B) lines. Both lines provide the same output, with two leading zeros,followed by channel A's output, then two leading zeros, followed by Channel B's output. 

 

So all you need to drive this device is a Single SPI line, controlling the clock,CS signal and reading from either data lines. 

 

So i can drive the clock, leave  SDATA(B) empty and attach the data line to SDATA(A), set the clock frequency so that it samples the inputs at 1MPSP each(sampling slower than 3)?

 

Also the device says "simultaneous sampling" but usually there is a delay..is this specified anywhere on the data sheet?

 

Thanks in advance

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