Re AD9371 DEV_CLK inputs (balls E7/E8)
Your userguide Ug992 page 104 states that DC blocking capacitors should be placed between the receive pins and the 100ohm termination resistor.
This is counter to all other LVDS type documentation, which places the termination resistor directly across the receiver pins and places the DC blocking capacitors at the tx end of the clock lines.
Placing the capacitors as suggested will make routing harder and impact performance as there is more copper in the unmatched part of the line beyond the 100ohm resistor. Is there any definite reason why the termination resistor cannot be placed directly across the DEV_CLK pins with the DC blocks on the Tx end of the line?