We wish to develop applications from the reference design as a baseline.
Running through the 2016_r2 reference design for the AD9371 on the ZC706 platform
I have downloaded the latest version, and installed Vivado 2016.2 as recommended. I have used the Xilinx make as we run in windows. It seems to run through ok. It seemed to hang from the DOS prompt so I opened up the Vivado GUI. The project seems to have been made ok but failed synthesis.
When I continue to run from the GUI it does go through synth and impl - but fails timing worst case about -2 ns.
Is this correct?
Is there an archived Vivado project we could start from?