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About AD9910 DRG Amplitude problem

Question asked by Liangyanjun on Jun 14, 2017
Latest reply on Jun 16, 2017 by Liangyanjun

Hi,everybody:

          I have a problem about AD9910 DRG Amplitude mode. I want to config a  triangular wave and it`s cycle is more than 30us, I have config a triangular wave ,but it`s cycle is only 4us, when I change the step size or step interval ,it is not very straight. My question is , how can I do to keep the cycle more than 30us and keep the wave straight?

here is the picture for DRG Amplitude,the system clock is 500Mhz(external clock 500M and not PLL) and my Register Map Values (4us cycle)is like that:

0x00    0x00000000

0x01    0x006E0820

0x02    0x1F3FC000

0x0B    0xFFFC000000000000

0x0C    0x00FF000000FF0000

0x0D    0x00010001

I/O UPDATE(Low-High-Low)

DDS_DRCTL_Pin(Low-High-Low)

my Register Map Values (30us cycle)is like that:

0x00    0x00000000

0x01    0x006E0820

0x02    0x1F3FC000

0x0B    0xFFFC000000000000

0x0C    0x009F0000009F0000

0x0D    0x00050005

I/O UPDATE(Low-High-Low)

DDS_DRCTL_Pin(Low-High-Low)

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