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AD9523-1 PLL2 not locking (DAQ2 + ZC706)

Question asked by rigodiaz on Jun 14, 2017
Latest reply on Jun 16, 2017 by neilw

Hi Guys,

 

I have a custom design based off of the FMCDAQ2 card with the ZC706 board (using HDL 2016_r2 and Linux 2016_R2). The only difference is that OSC_IN going to the AD9523-1 is coming from a 200 MHz VCXO oscillator. 

 

In my device tree I have changed these lines:

adi,vcxo-freq = <200000000>;

adi,pll2-ndiv-a-cnt = <3>;

adi,pll2-ndiv-b-cnt = <3>;

 

Is there anything else that needs to be changed?

 

Thanks, 

 

Rigo

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