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what is the meaning of the TXDATA Ramp Clock in R5 of adf4159?

Question asked by xhl on Jun 14, 2017
Latest reply on Apr 26, 2018 by ettien_mc2

on the page 21 in the datasheet,

TXDATA Ramp Clock
When Bit DB29 is set to 0, the clock divider clock is used to clock the ramp. When Bit DB29 is set to 1, the TXDATA clock is used to clock the ramp.

what is the meaning of the TXDATA Ramp Clock in R5 of adf4159?

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