What is the lo frequency stability of AD9361 chip.
How can we improve the lo frequency stability of AD9361
AD9361 internally uses PLL to generate LO and stability depends on the reference given to chip.
Thankx for your reply. Can you please suggest me what is the relation between external reference specification and internal LO stability. I want LO having stability less than 1ppm.
It is direct relation, if you want 1ppm LO stability then you need to have a reference with same stability .
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