I have a 64Khz LRCLK pulse that I want to route through the 21489 DSP using the SRU, it is 122nS wide at a 64Khz rate. I want to change it to 244nS wide at 16Khz rate.
You may use the precision clock generators (PCG) to achieve your scenario. The PCG generates a pair of signals (clock and frame sync) derived from a clock input signal. Its input clock can be selected from CLKIN, PCLK or external DAI pins. It provides four different clock dividers for serial clock, frame sync, phase (20-bit) and pulse width (16-bit).Please refer Precision Clock Generators chapter in the ADSP-214xx hardware reference manual for more information.
You may refer the attached code for your development.
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