I have learned about how to add custom ip to the reference design from this wiki: A simple BBP for RF Transceivers [Analog Devices Wiki] .
But I found that Xilinx IP core (e.g. FIR filter) do not have .v sources files, while the IP core can be generated by vivado.
The wiki above uses .tcl files and tells nothing about how to use the vivado generated files. So how can I use the generated files?
Thanks in advance.