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AD9958/PCB input clock

Question asked by alphy on May 30, 2017
Latest reply on Jun 1, 2017 by mcee

Hello,

I have a question in regards to the SYNC_CLK (J13) output, the schematic diagram in the manual says that it should output a signal that is 1/4 of the input clock frequency but we get a square wave that's 1000 times lower than the expected output frequency. Could this possible be due to our input clock? Does the clock we input need to have some DC offset on it?

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