Hi. I'm using an AD9914 as part of an AC offset cancellation scheme. For this purpose a low frequency (50MHz) reference is driving REF_CLK, multiplied x50 and divided /50 to create an amplitude/phase variable signal.
The problem is that when I combine the offset and the replica, the output signal power "jitters". I went through the datasheet and I'm wondering if this is a result of rounding error in the profile MOD2 frequency divider.
I noticed that if I use a 2^x multiplication/division ratio (e.g CLK_REF=39, MUL=64, SYS_CLK=2496) and then divide /64, I don't experience the erroneous behavior.
Am I correct? If so, is there a way to create an arbitrary output frequency which is locked to REF_CLK?