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Question asked by ADIguy on May 26, 2017
Latest reply on Jun 1, 2017 by Rob.Analog

My question is as follows for the ADV7280M related to MIPI CSI2. I have qty 6 ADV7280M in my design which gives me 6 MIPI clocks and Data lines. I do not have enough unused PLLs on the FPGA to pick up all the ADV7280M MIPI clocks. If I synchronize all the ADV7280M system clocks, will the MIPI clocks be in phase with one another? Therefore will I only need to pick up one ADV7280M MIPI clock on the FPGA?