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AD8285 Channel delay

Question asked by shenyang on May 26, 2017
Latest reply on May 30, 2017 by ARoxas

We used 4 channels of  AD8285. As datasheet, "Channel A is usually the first converted input", but we found CH-D is the first converted input.

We input the same sine wave to 4 channels. ADC setting is 

adc_spi_write ( 0x0C, 0x06 ); // adc output 4 channels  A B C D
adc_spi_write ( 0xFF, 0x01 ); // sync register

Please find following figure. CH-D is the first converted input obviously.

figure_1

 

We are sure CH-A and CH-D are not mixed. So we go on to next test. 

Input the same sine wave to CH-A B C and input the difference frequecncy to AUX, ADC setting is 

adc_spi_write ( 0x0C, 0x07 ); // adc output 4 channels  A B C AUX
adc_spi_write ( 0xFF, 0x01 ); // sync register

Please see the test result. Channel A is always the last converted input.

 

Is there anything wrong? Confused...

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