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overlapping dts subnodes in ad9361 [zynqmp] ?

Question asked by ENGINEER on May 23, 2017
Latest reply on May 23, 2017 by mhennerich

Hi,

in this link

 

====================================================================

/ {
fpga_axi: fpga-axi@0 {
interrupt-parent = <&gic>;
compatible = "simple-bus";
#address-cells = <0x2>;
#size-cells = <0x1>;
ranges = <0 0 0 0 0xffffffff>;
rx_dma: dma@80010000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x0 0x80010000 0x10000>;
#dma-cells = <1>;
interrupts = <0 109 0>;
clocks = <&clk100>;
dma-channel {
adi,source-bus-width = <64>;
adi,destination-bus-width = <64>;
adi,type = <0>;
};
};
tx_dma: dma@80020000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x0 0x80020000 0x10000>;
#dma-cells = <1>;
interrupts = <0 108 0>;
clocks = <&clk100>;
dma-channel {
adi,source-bus-width = <64>;
adi,destination-bus-width = <64>;
adi,type = <1>;
adi,cyclic;
};
};
cf_ad9361_adc_core_0: cf-ad9361-lpc@80000000 {
compatible = "adi,axi-ad9361-6.00.a";
reg = <0x0 0x80000000 0x6000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
spibus-connected = <&adc0_ad9361>;
};
cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@80004000 {
compatible = "adi,axi-ad9361-dds-6.00.a";
reg = <0x0 0x80004000 0x1000>;
clocks = <&adc0_ad9361 13>;
clock-names = "sampl_clk";
dmas = <&tx_dma 0>;
dma-names = "tx";
};
};
};

=================================================================

 

In the above case,

                                          start address         length

rxdma                                 0x80010000         0x10000

cf-ad9361-lpc                     0x80000000         0x06000

cf-ad9361-dds-core-lpc     0x80004000         0x01000

tx_dma                               0x80020000         0x10000   

 

isn't the cf-ad9361-lpc and cf-ad9361-dds-core-lpc are overlapping ? [or i am missing anything in my understanding]

 

                                             start address      end address 

cf-ad9361-lpc                     0x80000000         0x80006000         

cf-ad9361-dds-core-lpc     0x80004000         0x80005000 

 

I captured iomem as well [which looks correct]

80000000-80005fff : /fpga-axi@0/cf-ad9361-lpc@80000000
80010000-8001ffff : /fpga-axi@0/dma@80010000
80020000-8002ffff : /fpga-axi@0/dma@80020000

 

Thanks

 

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