If I was to set up a BF592 to read an ADC via SPI with TIMOD set to b#10; will the next SPI transfer occur imediatly after the transfer from SPI_RDBR to RAM?
As mentioned in HRM, "A value of b#10 selects DMA receive mode and the first transaction is initiated by enabling the SPI for DMA receive mode. Subsequent individual transactions are initiated by a DMA read of the SPI_RDBR register."
Thanks, I thought this was correct, but people were trying to convice me otherwise.
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